The Rise of Formal Verification

In the past, Formal Verification was something often discussed and rarely implemented, pushed aside for simulation based techniques. With only a select few specialists in this area the technology that has been around for over a decade looked set to sit on the bench, despite its obvious advantages in reducing the time and cost of ASIC design, when compared to standard functional verification techniques.

Here at IC Resources, we have noticed a shift in this trend in recent years, with a huge rise in the demand for engineers with formal verification experience, and indeed for specialist engineers concentrating solely on formal verification and its development. So where did this come from?

A definite source has been the growing number of researchers concentrating on formal methods, who have joined companies with the specific intention of expanding the use of these techniques to improve functional verification, and succeeding! With the rising complexity of IC designs, formal verification is now more important than ever, and looks set to become a standard part of all future verification plans. Hooray!

Click on the links below to view all the formal verification opportunities available today, and get involved!

Formal Verification & Validation Engineer - London
Formal Verification R&D Engineer - Cambridge
Principal Verification Engineer - Cambridge
Digital Design Verification Engineer - Bristol
Staff Verification Engineer - Sheffield
Senior Verification Engineer - Munich

UKESF’s Scholar of the Year Award

One of IC Resources’ primary clients, CSR, was recently indirectly recognised in an award presented by the NMI.

Rares-Mihai Popa received the UKESF’s Scholar of the Year award at this year’s NMI annual extravaganza….Rares-Mihai, of University of Edinburgh, was sponsored by CSR for his work experience, where he contributed to a number of IC design related projects for CSR.

Rares-Mihai Popa receives UKESF scholar award from Derek Boyd, CEO, NMI and Neil Dickins, IC Group